Experience:
> 8 in BE and BE leading experience
Description:
Backend manager with excellent technical knowledge and experience of at least 8 years at the backend area
Lead chip design methodologies with emphasis on RTL to GDS flows, STA/Place and Route/Synthesis till TapeOut. Responsible for the backend execution and methodologies
Requirements:
Experienced Physical Design engineer in at least one of the following: Synthesis, Static timing analysis (STA), Floor-planning, place & route, Power and noise analysis, DFT (Advantage)
Technical & personal leadership skills
